IEE Proceedings, Special Issue on Silicon Debug and Diagnosis

CALL FOR PAPERS

Overview -- Guest Editors -- Submission Details

Overview

The limitations in accurate modeling of circuits with millions of transistors make pre-silicon verification methods insufficient to guarantee an error-free product upon first silicon. In addition, many electrical problems cannot be screened before the first tape-out. As a consequence, it is imperative that undetected functional and electrical errors are fixed as soon as the first silicon is available. Silicon debug and diagnosis is the process of finding, locating, and identifying design errors and/or physical defects during silicon bring-up. On this topic, a Special Issue of IEE Proceedings Computers & Digital Techniques is planned for publication in September 2007. Submissions of scientific results, methods, tools, and practical case studies are invited. The areas of interest include (but are not limited to) the following:

Board/System Level Debug and Diagnosis
Debug for Programmable Logic Devices
Design and Synthesis for Debug
Equipment Impact and Techniques
Infrastructure IP for Debug and Diagnosis
Methods for Silicon Debug and Diagnosis
Microprocessor and SOC Debug and Diagnosis
Reuse of Test Infrastructure for Debug
Silicon Debug of Embedded Cores
Standardization for Debug and Diagnosis
Structured Debug Architectures
Tools for Silicon Debug and Diagnosis

Guest Editors

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Nicola Nicolici
McMaster University
Department of Electrical & Computer Engineering
1280 Main Street West - ITB/A210
Hamilton, ON L8S 4K1, Canada

Email: nicola@ece.mcmaster.ca
Tel: +1 905 525 9140 ext 27598
Fax: +1 905 521 2922

Erik Jan Marinissen
Philips Research Laboratories
IC Design - Digital Design & Test
Prof. Holstlaan 4 - WAY 4.083
5656 AA Eindhoven, The Netherlands

Email: erik.jan.marinissen@philips.com
Tel.: +31 40 27 43227
Fax: +31 40 27 44113

Submission Details

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Submission deadline: November 15, 2006

Reviews completed: February 15, 2007

Revised submissions due (if applicable): March 15, 2007

Notification of acceptance: May 15, 2007

Final manuscripts due: June 15, 2007

Target publication date: September 2007

Manuscripts should not exceed 4000 words (excluding references, tables and figures).

Information for authors can be found at http://www.iee.org/Publish/Support/Auth/. When submitting please be sure to complete the “Special Issue” section.

All manuscripts should be submitted online at http://mc.manuscriptcentral.com/iee/cdt.

All submitted papers will be subject to the IEE Proceedings' stringent refereeing procedures. Prospective authors may contact the guest editors for further information.

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